FIFO configuration register.
RXFIFO_WM_THRHD | Configures the water mark threshold of RXFIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than reg_rxfifo_wm_thrhd[4:0], reg_rxfifo_wm_int_raw bit will be valid. |
TXFIFO_WM_THRHD | Configures the water mark threshold of TXFIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than reg_txfifo_wm_thrhd[4:0], reg_txfifo_wm_int_raw bit will be valid. |
NONFIFO_EN | Configures to enable APB nonfifo access. |
FIFO_ADDR_CFG_EN | Configures to enable double addressing mode. When this mode is enabled, the byte received after the I2C address byte represents the offset address in the I2C Slave RAM. 0: Disable 1: Enable |
RX_FIFO_RST | Configures to reset RXFIFO. 0: No effect 1: Reset |
TX_FIFO_RST | Configures to reset TXFIFO. 0: No effect 1: Reset |
FIFO_PRT_EN | Configures to enable FIFO pointer in non-fifo access mode. This bit controls the valid bits and the TX/RX FIFO overflow, underflow, full and empty interrupts. 0: No effect 1: Enable |